Computer Engineering · UTRGV · McAllen, Texas
I’m Jose Carlos Arce Camet, a Computer Engineering student building complete software products across AI, audio, finance, workflow systems, and interaction-heavy frontend experiences.
My work combines technical architecture, secure user-owned data, accessibility, testing, and original product design.
Seeking software engineering, full-stack, and AI application opportunities.
Each project isolates a different kind of risk—from AI context and audio validation to financial correctness, workflow modeling, and keyboard interaction, down to storage durability, process control, and sensor-fault handling.
Exact financial logic
Exact money calculations, accessible analytics, and user-owned financial data.
An authenticated finance workspace for transactions, monthly budgets, cash-flow analytics, filtering, and defensive CSV export.
AI orchestration
Inspectable personal AI with approved memory and selective response evaluation.
A full-stack AI workspace combining mode-specific conversations, approval-gated memory, document workflows, tasks, saved insights, and inspectable execution decisions.
Audio processing
Explainable audio recognition with secure full-stack workflows.
An experimental audio-recognition application that analyzes microphone or uploaded clips, ranks an original catalog, and explains confidence through signal and score diagnostics.
Business workflow modeling
A private recruiting pipeline for applications, follow-ups, and interview milestones.
A Supabase-backed job-search workspace for managing opportunities, recruiter context, deadlines, activity history, and pipeline analytics.
Accessible interaction
Accessible local chess built on a replayable move-log architecture.
A local two-player chess interface with complete legal-move integration, SAN history, keyboard interaction, responsive geometry, and original SVG pieces.
Durability and concurrency
A persistent key-value server in Rust with a bounded binary protocol and crash-conscious storage.
A single-node TCP key-value service with concurrent clients, synchronized shared state, TTLs, a CRC32 append-only log, restart replay, compaction, and structured metrics.
Process control
A small POSIX shell in C built directly on fork, exec, pipes, and signals.
A deliberately small shell that implements pipelines, redirection, background jobs, zombie-free reaping, and a defensible signal model from raw process-control syscalls.
Fault-tolerant control logic
Fault-tolerant cooling-controller firmware for the Arduino Mega 2560, with verified control logic and hardware bring-up still ahead.
An in-progress embedded controller with dual temperature sensors, an asymmetric fault-handling state machine, and a line-based serial protocol. The firmware logic and host harness are verified in software; no physical hardware bring-up has happened yet.
Capabilities are grouped by engineering responsibility, not presented as a wall of logos.
Explicit orchestration and bounded context instead of opaque behavior.
Complete workflows across interface, API, persistence, and ownership boundaries.
Interfaces built around complex state, clarity, and accessible interaction.
Authorization, validation, and failure modes treated as product concerns.
Risk-focused verification from pure logic through real-browser behavior.
Model the system before styling the screen.
Treat user ownership as a backend responsibility.
Make uncertain behavior inspectable.
Use design to clarify—not obscure—the product.
I’m a Computer Engineering student at UTRGV with a software-focused project portfolio spanning AI systems, browser audio, finance tools, operational dashboards, and accessible interfaces.
I’m especially interested in full-stack product engineering: translating an idea into a working system, defining its data and trust boundaries, and refining the experience until it feels deliberate.
More about my processI’m open to software-engineering internships, junior development opportunities, remote or hybrid technical work, and selected freelance projects.